Practice Free FlashArray-Implementation-Specialist Pure Certified FlashArray Implementation Specialist (FAIS) Exam Exam Questions Answers With Explanation

The FlashArray//XL series (such as the XL130R5) utilizes a modern backend connectivity architecture for its expansion shelves, specifically the DirectFlash Shelf (DFS). Unlike older generations that might have used SAS (Serial Attached SCSI) for shelf connectivity, the //XL architecture relies on high-speed Ethernet with RoCE (RDMA over Converged Ethernet) to communicate with external media shelves. This ensures that the NVMe drives in the shelf perform with the same low latency as those in the head unit.

To attach a DirectFlash Shelf to a FlashArray//XL130R5, the chassis must be populated with specific PCIe interface cards designated for shelf back-end connectivity. The correct part for this is theFA-XL-100G Ethernet/RoCE 2-Portcard. This card provides the necessary 100 Gigabit Ethernet bandwidth and RoCE protocol support required for the NVMe-oF (NVMe over Fabrics) backend fabric that Pure Storage uses.

It is crucial to distinguish this from host-facing cards. While an "iSCSI/RoCE" card exists, the shelf connectivity specifically utilizes the "Ethernet/RoCE" designation in the BOM to differentiate backend fabric ports from frontend host ports. The 200G options are generally reserved for host connectivity or inter-array clustering in specific high-performance setups, but the standard validated card for connecting the DFS to the //XL130R5 is the 100G Ethernet/RoCE adapter. Verifying this line item on the BOM prevents onsite delays where the engineer might otherwise find themselves with incompatible ports for the expansion shelves.

The FlashArray//XL platform features a split-chassis design with a unique PCIe bus layout compared to the standard //X series. To maintain optimal performance and redundancy, the backend connectivity for DirectFlash Shelves (DFS) must be balanced across the specific PCIe root complexes managed by the dual CPUs.

For a configuration involving multiple shelves (specifically targeting the logical shelf identifiers SH8 and SH9, which often correspond to the first pair of backend loops in an //XL deployment), the validated configuration is to usePCIe Slot 0andPCIe Slot 6. These slots are architecturally designated for the backend NVMe-oF (RoCE) fabric cards.

Using Slot 0 (typically located on the far left) and Slot 6 (located on the right side of the chassis) ensures that the I/O load is distributed across the internal midplane and CPUs correctly. Placing cards in incorrect slots (like Slot 1 or 7, which might be reserved for host I/O or inter-controller links) can result in shelf detection failures or performance bottlenecks where one CPU is overloaded with backend traffic while the other is idle.

=========

When performing a Hardware Non-Disruptive Upgrade (HWNDU) or preparing for a Purity software upgrade, the Implementation Engineer must log in with a user account that has full administrative privileges to execute upgrade commands, run health checks, and manage the array state.

Thepureuseraccount is the standard administrative superuser for the FlashArray. It is used for all day-to-day administration and maintenance tasks, including initiating upgrades via the CLI (pureinstall or pureupdate commands) and verifying system health (purearray health, pureadm list). The puresetup account is strictly for initial array initialization (setting IPs and array name) and is disabled or restricted once the array is up and running. pureinstall is a command, not a user account. Therefore, pureuser is the correct authenticated session required to manage the upgrade process.

=========

At the completion of an upgrade, the correct command to manually trigger the upload of the relevant logs ispurearray phonehome --send-today.

Purpose:This specific argument (--send-today) instructs the array to bundle and upload all log files generated within the current 24-hour window. This is the standard procedure post-upgrade because it ensures that all logs capturing the pre-upgrade state, the upgrade process itself, and the immediate post-upgrade health checks are transmitted to Pure Support.

Verification:This allows the Support team to validate that the upgrade completed successfully and that no dormant issues were triggered during the controller failovers.

Syntax:Option A (purelogs) is not a valid command. Option B (--send-logs) is a generic approximation, but the specific "today" flag is the best practice command cited in upgrade checklists to avoid uploading gigabytes of historical data irrelevant to the immediate event.

After finishing an upgrade or major maintenance event, it is standard practice to manually trigger a log upload to Pure1. This ensures that the most recent diagnostic data—covering the upgrade window itself—is available to Pure Storage Support for verification and historical record.

The commandpurearray phonehome --send-todayis the standard syntax used to force an immediate upload of the current day's logs. This command packages the relevant logs from the upgrade period and pushes them to the Pure1 cloud.

Options like purearray phonehome --send-logs or purelogs --send-all are often incorrect syntax or deprecated aliases.

--send-today is specific and efficient, targeting exactly the timeframe relevant to the maintenance window just completed.

=========

Hardware Non-Disruptive Upgrades (HWNDU) rely strictly on the array being in a fully healthy state before the process begins. The validate-array-health check is designed to gate the upgrade if any component that provides redundancy or data integrity is compromised. NVRAM (Non-Volatile Random Access Memory) modules are critical components in the FlashArray architecture; they store in-flight write data to ensure it is persistent before being destaged to flash.

A "Code 60" alert specifically points to a hardware issue with an NVRAM module. While the //X70 model indeed has redundancy (often using multiple NVRAM modules), proceeding with an upgrade while one is degraded puts the array at risk. During an NDU, controllers reboot and failover; running on reduced redundancy during these critical operations is not supported and is blocked by the health checks.

The correct first step for an Implementation Engineer is to attempt toreseat the unhealthy NVRAM module. Often, connection issues or transient seating faults can trigger these alerts. After reseating, the engineer must run the health check again to confirm the module status has returned to "healthy." If the module remains unhealthy after reseating, it must be replaced before the upgrade can proceed. You cannot simply disable it or ignore it, as the upgrade script will likely refuse to continue to protect data integrity.

=========

To correctly configure the proxy settings for Phonehome and Remote Assist on a FlashArray, the Implementation Engineer requires theProtocol prefix (HTTP/HTTPS)and thePort numberin addition to the IP address.

The Purity operating system requires a complete URL structure to establish a connection through a proxy server. A raw IP address like "10.24.18.120" is insufficient because the array does not know which communication protocol to use or which listening port the proxy server is monitoring.

Correct Format:The required input format is typically scheme://host:port. For example, https://10.24.18.120:8080 or http://10.24.18.120:3128.

Why it's critical:Without the port, the connection will likely time out or be rejected. Without the protocol (http vs. https), the handshake may fail. While credentials (username/password) might be required if the proxy enforces authentication, they are optional depending on the customer's network policy. However, the port and protocol arealwaystechnically mandatory to form a valid network socket connection.

In the architectural evolution from FlashArray//XR2 and //XR3 to the FlashArray//XR4, Pure Storage made significant changes to the controller's rear panel and I/O design to accommodate higher performance and PCIe Gen 4 capabilities. One of the most critical changes for an Implementation Engineer to plan for during a hardware Non-Disruptive Upgrade (NDU) is the removal of the onboard, default iSCSI ports that were present on previous generations.

On //XR2 and //XR3 controllers, there were onboard Ethernet ports often used for iSCSI host connectivity without requiring a discrete PCIe adapter. However, the //XR4 controller design removes these dedicated onboard iSCSI ports to streamline the motherboard design and shift host I/O strictly to PCIe add-in cards. The //XR4 retains onboard ports specifically for Management (Mgmt) and Replication connectivity,ensuring that administrative access and array-to-array replication can still be maintained without additional hardware.

Consequently, if a customer was relying solely on the onboard ports for iSCSI traffic on their legacy //XR2 or //XR3, the Bill of Materials (BOM) for the upgrade to //XR4 must include discrete Ethernet/iSCSI PCIe cards to migrate those connections. Failure to identify this architectural difference during the pre-upgrade inventory can result in a loss of host connectivity or an inability to cable the new controllers correctly, as the expected physical ports simply will not exist on the new chassis.

=========

When new capacity (a data pack) is physically installed into a FlashArray, the drives are detected by the system but are not automatically added to the storage pool to prevent accidental data overwrites or configuration errors. They appear in an "unadmitted" state.

To logically add these drives to the array's capacity, the Implementation Engineer must explicitly admit them. The command to perform this action ispurearray drive admit(or puredrive admit in some contexts, but purearray drive admit is the specific option provided and valid). This command triggers the Purity software to format the new drives, add them to the system's write groups, and begin rebalancing data across the expanded capacity. Without running this admission command, the drives will remain visible but unusable for storage.

=========

On aFlashArray//XR2 or //XR3, if a dedicatedPCIe SAS HBA(Host Bus Adapter) is required for external shelf connectivity (expanding beyond the onboard SAS ports), it must be installed inSlot 1.

The PCIe slot prioritization on the FlashArray//X R2/R3 controllers is strictly defined to ensure optimal performance and lane distribution:

Slot 0:Reserved primarily for frontend Host I/O cards (Fibre Channel or iSCSI/Ethernet). This slot usually connects to CPU 0 and offers high bandwidth for host traffic.

Slot 1:Designated as the primary expansion slot forbackend connectivity(SAS cards for expansion shelves) or secondary Host I/O if no SAS expansion is needed.

Slot 2:On smaller models (X10/X20), this is often theonlyhost I/O slot, but on the larger X50/X70/X90 chassis, it is used for additional Host I/O.

If an Implementation Engineer installs a SAS card in Slot 0, the system may fail to recognize the shelves correctly or may flag a configuration error, as the Purity software expects backend expansion traffic to route through the bus associated with Slot 1. Therefore, for SAS expansion cards, Slot 1 is the mandatory location.

To verify the status, presence, and admission of a specific data pack, the correct command ispuredrive list --pack CH0.BAY10.

In the context of FlashArray geometry, a "Write Group" (RAID set) is formed by combining DirectFlash Modules. A"Wide Write Group"typically consists of 10 modules (a full data pack). When an engineer installs a standard 10-pack of drives (Bays 10-19), verifying that all 10 drives are successfully recognized and "admitted" confirms that the system has formed the intended wide write group.

The puredrive list command with the --pack argument filters the output to show only the drives in that specific pack. The engineer checks that all 10 drives are listed and their status is"healthy"or"admitted". If fewer drives were admitted (e.g., only 5), it would indicate a "narrow" write group or a hardware issue.

Option A (find_drive.py)is a utility script used to physically locate a drive by blinking its LED, not to check logical RAID configuration.

Option B (puredb list drives)is an internal engineering command (puredb) that is generally not intended for standard field verification and may require root-level access. The puredrive command is the standard CLI tool for this validation.

A "4X Module" kit is specifically designedto widen an existing write group(RAID set).

Write Group Geometry:In standard FlashArray//X configurations, DirectFlash Modules (DFMs) operate in "Write Groups" (typically 10 modules wide for a standard data pack). However, to offer more flexible entry points or capacity expansion options, Pure Storage allows configurations that start with smaller write groups (e.g., 6 modules).

Widening:When a customer wants to expand capacity or performance on these smaller configurations without adding a full new 10-pack, they can purchase a widening kit (in this case, 4 modules).

Process:The Implementation Engineer installs these 4 modules into the empty slots. The Purity operating system then logically integrates these new drives into the existing narrow write group, "widening" it to the standard width (e.g., 6 + 4 = 10). This operation redistributes parity and data across the full set of 10 drives, improving performance and efficiency.

The FlashArray//XL170R5 is a high-performance, high-capacity enterprise storage system. To maintain its performance characteristics and data layout efficiency, Pure Storage enforces aminimum raw capacityrequirement for new orders and installations.

For the//XL170R5model, the minimum supported configuration is115TBof raw flash. This is typically achieved through a specific population of DirectFlash Modules (e.g., twenty 5.5TB modules or a similar combination that meets the threshold).

Implementation Engineers must verify during the pre-installation site readiness review that the hardware delivered matches this minimum. Attempting to initialize an //XL170 with significantly less capacity (e.g., 90TB) would be an unsupported configuration, potentially leading to performance degradation or an inability to initialize the wide write groups required by the //XL architecture.

=========

Service clearance is a critical physical installation requirement to ensure that components (like controllers, fans, and drives) can be safely removed and replaced without obstruction.

For theFlashArray//XR4, the specific service depth requirements are:

Front Panel:216 mm (8.5 in.). This allows sufficient room to open the bezel, unlatch drives, and pull them out of the chassis.

Rear Panel:530 mm (20.9 in.). This larger clearance is necessary because the controllers themselves (which are long, heavy components) slide out from the rear of the chassis. The engineer needs enough space to fully extract the controller without hitting a wall or another rack door.

Adhering to these clearances prevents situations where a failed controller cannot be replaced because the rack is too close to a wall.

=========

When adding a second DirectFlash Shelf to aFlashArray//XL, the connectivity utilizesPCIe Slot 6(in conjunction with Slot 0).

FlashArray//XL Architecture:The //XL chassis distributes its backend NVMe-oF (100GbE RoCE) connectivity across two dedicated PCIe slots to ensure redundancy and maximum bandwidth. As established in hardware diagrams,Slot 0(lower riser) andSlot 6(upper riser) are the designated slots for the 2-port 100GbE backend cards.

Expansion Logic:

First Shelf:Typically connects to Port 0 of the card in Slot 0 and Port 0 of the card in Slot 6 (providing HA).

Second Shelf:Connects to the remaining ports (Port 1) on thesame cardsin Slot 0 and Slot 6.

Exam Context:In the context of "which slot must be used" for the expansion or specifically highlighting the secondary backend slot distinct from the primary host slots,Slot 6is the correct identifier for the backend expansion capability on the //XL. Options A (Slot 0) is the primary, but C (Slot 6) is often the specific answer required to demonstrate knowledge of the //XL's unique split-riser backend layout compared to legacy arrays.

The FlashArray//XL features a robust2+2power supply unit (PSU) redundancy configuration. Unlike the smaller FlashArray//X chassis (3U), which typically utilizes two power supplies in a 1+1 redundancy setup, the FlashArray//XL utilizes a larger 5U chassis designed for higher performance and density, requiring a more substantial power infrastructure.

The //XL chassis is equipped with four physical Power Supply Units. These are configured to operate in an N+2 mode (effectively 2+2), meaning the system requires two PSUs to support the full electrical load of the chassis, while the other two provide redundancy. This architecture allows the array to survive the simultaneous failure or loss of input power to up to two power supplies without any interruption to service.

This design ensures maximum availability even in scenarios where an entire power grid feed (A-side or B-side) fails, or if multiple hardware components malfunction simultaneously. Options A (1+1) applies to the standard //X series, and Option C (3+1) is not a supported configuration for the FlashArray//XL. The 2+2 design is critical for maintaining the "Always-On" reliability standards required for the mission-critical workloads that the //XL platform supports.

TheFlashArray//XR2 and //XR3(representing the FlashArray//X generation) utilize a standardized3U(3 Rack Units) chassis form factor.

This 3U chassis is the foundation for the majority of the FlashArray//X line, including the //X10, //X20, //X50, //X70, and //X90 models. It is designed to be compact while providing sufficient airflow and space for the dual controllers, two data packs (up to 20 DirectFlash Modules), and power/cooling infrastructure.

Dimensions:Approximately 5.12 inches (13 cm) in height.

Rack Layout:Implementation Engineers must reserve 3U of contiguous space for the base controller chassis. If expansion shelves are included, they typically require an additional 2U each (for SAS or NVMe shelves).

Option B (4U) is not a standard height for current Pure Storage arrays. Option C (5U) refers to theFlashArray//XL, a larger, performance-optimized platform designed for maximum scale and density, which uses a significantly taller chassis to accommodate more expansion slots and power components. Therefore, for the specified R2/R3 X-series, 3U is the correct height.

On theFlashArray//XL, the 4-port Fibre Channel (FC) cards are specifically supported inSlot 8(and typically Slot 4 depending on configuration depth). The FlashArray//XL chassis (5U) utilizes a significantly different PCIe bus layout compared to the standard 3U FlashArray//X series. While the //X series typically uses Slot 0 or Slot 2 for host connectivity, the //XL architecture reserves the lower-numbered slots (0-3) primarily for backend connectivity (SAS/NVMe-oF) or specific NVRAM modules in certain configurations.

To support the high bandwidth requirements of the 4-port 32Gb FC cards, the //XL chassis provides specific x16 electrical slots. Slot 8 is a designated high-performance slot located in the upper riser section of the controller, making it the correct placement for these dense host I/O cards. Using an incorrect slot such as Slot 2 (often x8 or reserved for other functions in XL) would likely result in the card not being recognized or operating at reduced performance. Therefore, Implementation Engineers must verify the specific "slot map" for the //XL model in theFlashArray//XL Hardware Guidebefore seating cards, with Slot 8 being the standard supported location for the 4-port FC option among the choices provided.

TheCustomeris the mandatory party required to provide completion sign-off before the Implementation Engineer leaves the site.

According to the FlashArray Implementation Service Brief and standard operating procedures, the final step of the deployment phase is the "Project Sign-off." After the engineer has racked, cabled, initialized, and verified the array's health (often demonstrating connectivity and the Purity GUI), the customer must formally acknowledge that the installation meets the agreed-upon scope of work. This sign-off serves as the legal and operational acceptance of the hardware and software implementation.

While the Account Team manages the commercial relationship and Support may assist with technical hurdles, neither can validate that the physical implementation meets the customer's specific on-site requirements or that the "handover" of administration has occurred. The customer's signature (physical or digital) on the implementation checklist or service completion form signals the transition from the "Deployment" phase to the "Production/Support" phase.

Pure Storage has introducedSelf-Service Upgrades (SSU)via thePure1 Manageportal to provide customers with greater flexibility and control over their maintenance windows.

If a client cannot wait for a scheduled assisted upgrade with a Support Engineer, the validated and supported path is togo through the Self-Service upgrade portal on Pure1 Manage.

This portal performs the same pre-flight health checks (Remote Assist, array health, pathing) that a Support Engineer would perform manually.

Once the checks pass, the customer can schedule and initiate the Purity upgrade directly from the cloud dashboard.

The process is fully automated and monitored by Pure1. This eliminates the wait time for human resource availability while maintaining the safety guardrails of a supported upgrade. Manual USB installs (Option A) or direct CLI downloads (Option B) are generally restricted or not recommended for standard customer workflows without specific support supervision.

During the initial deployment phase of a FlashArray, thepuresetupuser is utilized to run the initial configuration scripts (setting IPs, array name, etc.). However, once the array initialization is complete and the Purity operating system is fully running, the puresetup account is effectively disabled or restricted from performing standard administrative tasks.

For all subsequent operations, including running final health checks, verifying services, and performing day-to-day management, the Implementation Engineer must switch to thepureuseraccount. This is the default administrative superuser for the FlashArray.

The pureuser account has full privileges to run commands like purearray list, pureadm list, and other validation tools required to sign off on the installation. The pureeng account is reserved strictly for internal Pure Storage Engineering use and is not available for standard implementation tasks. Therefore, attempting to log in as puresetup after the array is configured will often result in authentication failure or a restricted shell that does not allow for the necessary health validation commands.

=========

Establishing a serial console session is a fundamental step for initializing a new FlashArray or troubleshooting boot issues. To successfully communicate with the FlashArray controllers via the DB9 or Micro-USB serial port, the terminal emulator (such as PuTTY or TeraTerm) must be configured with specific parameters.

The verified standard settings for all modern FlashArray controllers are:

Baud Rate:115,200(This is faster than the legacy 9600 standard used on older network gear).

Data Bits:8

Parity:None (N)

Stop Bits:1

Flow Control:Xon/Xoff(Software flow control is preferred over hardware RTS/CTS).

Configuring these settings incorrectly (e.g., wrong baud rate) will result in garbled text ("garbage characters") or a completely blank screen when connecting to the console, preventing the engineer from running the puresetup initialization script.

On aFlashArray//XR2 or //XR3equipped with a4-port Fibre Channel card in Slot 1, the interfaces are namedFC4, FC5, FC6, and FC7.

The port enumeration logic on FlashArray controllers follows a sequential order based on the PCIe slot number:

Slot 0:This is the first PCIe slot. If a 4-port card is installed here (which is typical for the primary host I/O card), it claims the first block of names:FC0, FC1, FC2, and FC3.

Slot 1:This is the second PCIe slot. A 4-port card installed here continues the sequence immediately after Slot 0. Therefore, it claimsFC4, FC5, FC6, and FC7.

Slot 2:Any card here would start at FC8 (if the previous slots are 4-port).

Option A describes the mapping for Slot 0. Option C describes a non-standard mapping that skips integers or assumes a different starting point. Correctly identifying these interface names is crucial for zoning (SAN configuration) and creating the correct host port definitions during the implementation.

Verifying external connectivity is a critical final step in any maintenance window to ensure the array remains supported. The commandpuresupport testis the specific tool designed to validate the entire support communication chain.

Running puresupport test:

Checks DNS resolution for Pure1 endpoints.

Tests outbound HTTPS connectivity through any configured proxies.

Verifies the "Phone Home" log upload capability.

Validates the "Remote Assist" tunnel functionality.

This comprehensive check confirms that the array can "call home" if an issue arises and that Support can connect remotely if needed. purearray test is generic or refers to internal tests, whereas puresupport test explicitly targets the support infrastructure.

Pure Storage differentiates its product lines based on the type of NAND flash used, optimizing for either performance or capacity/cost.

FlashArray//XusesTLC (Triple-Level Cell)flash for high performance and endurance. These modules typically have orange tabs.

FlashArray//CandFlashArray//Eare designed for high-capacity, capacity-optimized workloads. They utilizeQLC (Quad-Level Cell)flash.

QLC flash stores 4 bits per cell, offering higher density at a lower cost per terabyte, but with different endurance characteristics managed by the DirectFlash software. To help engineers and customers physically distinguish these modules, QLC DirectFlash Modules featuregray release tabson the carrier. Identifying these tabs confirms that the correct media type is being installed into the capacity-oriented //C or //E chassis.

=========

On theFlashArray//XL,PCIe Slot 5is explicitly reserved forNon-Disruptive Upgrade (NDU)procedures and specific control plane functions.

The FlashArray//XL chassis (5U) features a redesigned controller layout with 9 PCIe slots per controller (numbered 0-8). While slots 0-3 and 6-8 are generally available for Host I/O (FC/iSCSI) or Backend Expansion (SAS/NVMe-oF),Slot 5is kept open or populated with specific interconnect cards used during controller upgrades.

During a "Data-in-Place" upgrade (e.g., moving from an //X to an //XL or upgrading //XL generations), this slot facilitates the high-speed link required to cluster the old and new controllers or to transfer state information. Implementation Engineers must ensure this slot is not populated with standard customer I/O cards (like FC HBAs) during the initial configuration, as doing so would block the ability to perform future non-disruptive hardware upgrades.

When performing a controller upgrade (Non-Disruptive Upgrade) from an //X50R3 to an //X50R4, the specific hardware configuration of the source array dictates the target bill of materials. The presence ofSAS drivesin the chassis indicates that the source is a legacy or transitional configuration, as the standard //X R4 platform is optimized for end-to-end NVMe (DirectFlash).

However, the question asks for the specific controller SKU required. In Pure Storage nomenclature for upgrades, the standard controller replacement part is typically the base model code, hereFLASHARRAY//XC50 R4.

The "XC" designation often refers to the controller component itself in upgrade kits. While special considerations apply to SAS media (which are usually phased out or require specific handling during R4 upgrades since R4 natively drops legacy SAS support on the motherboard), thecontrollerpart number itself remains the standard R4 SKU (Option C). Options like "SE" or "NS" (often denoting specific encryption or networking variants) are not the standard identifiers for the base controller upgrade in this context.

=========

DirectFlash Shelves (DFS) are populated with DirectFlash Modules (DFMs) or DFMDs (DirectFlash Module with Distributed NVRAM, though usually just DFMs in shelves). For theGen 2 DirectFlash Shelf, Pure Storage offers specific "starter packs" or partially populated configurations to allow for capacity flexibility while maintaining necessary performance and electrical balance.

The validated starter configurations for a Gen 2 DFS are12-slot and 14-slotpopulations. This means the shelf must be populated with at least this number of drives to be a supported configuration. Populating fewer than this (e.g., 8 or 10) might result in insufficient bandwidth utilization across the shelf's internal fabric or fail strict configuration checks in the Purity operating system. Engineers must verify the drive count matches these supported increments during inventory to avoid configuration errors during initialization.

=========

While modern FlashArrays (like the XR4 and XL series) primarily use NVMe-oF/RoCE for backend connectivity, specific configurations or legacy support scenarios may still require aSAS HBA(Serial Attached SCSI Host Bus Adapter), for example, when connecting to older SAS-based expansion shelves during a migration or hybrid configuration.

ForR4B revision controllers(a specific hardware revision of the Gen 4 controller), the strict hardware addressing map requires that any SAS HBA be installed inPCIe Slot 1.

Slot 1provides the specific PCIe lane routing and BIOS interrupts required for the legacy SAS controller to be recognized and function without conflicting with the native NVMe fabric.

Installing the card in Slot 0 (typically reserved for RoCE/Ethernet backend) or Slot 4 would likely result in the card being ignored by Purity or causing boot errors due to resource conflict.

To properly configure a FlashArray forActiveCluster with Ethernet replication, a total of9 IP addressesare typically required per array. If the installation document currently lists only3 IP addresses, the Implementation Engineer needs6 additional IP addresses.

The breakdown of the requirement is as follows:

Management (5 IPs):Standard ActiveCluster best practices mandate fully redundant management connectivity. This includes 1 Virtual IP (VIP) and 4 Physical IPs (CT0.eth0, CT1.eth0, CT0.eth1, and CT1.eth1). The initial "3 IP addresses" provided usually correspond to the basic setup (VIP, CT0.eth0, CT1.eth0), leaving a deficit of 2 management IPs (for the eth1 redundancy).

Replication (4 IPs):ActiveCluster over Ethernet requires dedicated replication ports separate from management. The standard configuration utilizes two physical ports per controller for redundancy (e.g., CT0.eth2, CT0.eth3, CT1.eth2, CT1.eth3), requiring 4 unique IP addresses.

Therefore, 2 additional management IPs + 4 replication IPs =6 additional IPsrequired to meet the strict redundancy standards for an ActiveCluster deployment.

Before performing a physical card addition (I/O expansion) on a specific controller, it should be in theSecondarystate.

The procedure for adding hardware to a FlashArray is a sequential, non-disruptive process. You cannot add a card to thePrimarycontroller because it is actively handling host I/O; opening it would cause a service outage. Therefore, the Implementation Engineer must first verify the cluster health and, if necessary, perform a manual failover (pureadm make --secondary) to ensure the target controller isSecondary.

Once the controller is Secondary (passing no I/O), the engineer proceeds to stop the Purity software (pureadm stop) and/or power down the controller to safely install the PCIe card. While the physical work happens when the controller is powered off/inactive, "Secondary" is the correct operational starting state required to begin the maintenance workflow safely. "Standby" is often used to refer to a controller that is powered on but not running Purity, which is a subsequent step, not the initial prerequisite state relative to the cluster role.

Pure Storage enforces strict naming conventions for FlashArrays to ensure compatibility with network protocols (like DNS), replication pairing, and fleet management tools. The allowable character set for an array name is alphanumeric characters (A-Z, a-z, 0-9) and hyphens (-).

The proposed name "corporate Lab-0L" contains aspacecharacter between "corporate" and "Lab-0L".FlashArray names cannot contain spaces.

Hyphens (Option A) are allowed and commonly used (e.g., FlashArray-01).

Numbers (Option B) are allowed (e.g., Lab-01).

To resolve the error, the Implementation Engineer should replace the space with a hyphen or remove it entirely (e.g., corporate-Lab-0L or corporateLab-0L). This restriction prevents issues with CLI parsing and host hostname resolution where spaces are often interpreted as delimiters.

On aFlashArray//X20 (R2 or R3), the default Fibre Channel configuration is a2-port FC card installed in Slot 2.

The FlashArray//X hardware architecture differentiates slot usage based on the controller model:

Entry Level (X10/X20):These controllers have a limited number of PCIe lanes and slots available for user expansion. Slots 0 and 1 are often utilized by internal system components or reserved. Therefore, the primary Host I/O card (FC or iSCSI) is standardly installed inSlot 2. Additionally, due to the entry-level positioning, the 2-port card is the standard default (though 4-port is supported).

Performance Level (X50/X70/X90):As seen in previous questions, these models prioritizeSlot 0for Host I/O and typically default to4-portcards.

The distinction is critical for Implementation Engineers to ensure they are cabling the correct ports. For an X20, cabling Slot 0 (if a port is even visible) would be incorrect; the active host ports are in Slot 2.

ActiveCluster, Pure Storage's synchronous replication solution for zero RPO/RTO, currently supports a maximum of2 arraysin a single active-active relationship (often referred to as a "Pod").

Architecture:The ActiveCluster architecture is strictly designed as a 1:1 synchronous pairing between two FlashArrays. This allows both arrays to serve reads and writes for the same volumes simultaneously.

Stretched Clustering:The limit of two arrays ensures that the synchronous acknowledgement (ACK) process for writes remains performant and manageable over the inter-site link. Adding a third array to the synchronous loop would exponentially increase write latency and complexity.

3-Data Center Configurations:While you can configure a "3DC" architecture, this involves one ActiveCluster pair (2 arrays) replicating asynchronously to a third, standalone array (ActiveCluster + ActiveDR or Async). However, the synchronous ActiveCluster domain itself never exceeds 2 arrays.

The FlashArray//XR4 introduces a new hardware platform architecture (internally codenamed or associated with "Cobalt" components for its BMC and chassis management). During the manufacturing and initial deployment phase, specific validation scripts are used to ensure the platform hardware is correctly initialized before the Purity Operating Environment takes over.

For a new install of a FlashArray//XR4, the Implementation Engineer is often required to runcobalt check . py(or cobalt_check.py).

This engineering-level Python script queries the Baseboard Management Controller (BMC) and internal sensors to verify that the chassis components, fans, and power delivery systems are reporting "Healthy" status specifically for the R4 architecture.

Running thisbeforepuresetup prevents the setup process from failing midway due to a hardware initialization error. It acts as a "pre-flight" hardware validation specific to the R4 generation's new chipset and management subsystem.

=========

To determine the specific model of a replacement controller while in the puresetup or manufacturing shell (before the controller has joined the cluster), the correct command ishwconfig --model.

During a controller replacement procedure, the engineer often connects to the new controller via serial or a temporary IP. At this stage, the full Purity CLI (and thus purearray list) may not be fully available or relevant because the controller is in a "setup" or "unconfigured" state.

hwconfig: This is a lower-level utility used to read the Field Replaceable Unit (FRU) data directly from the hardware VPD (Vital Product Data).

--model: This flag specifically filters the output to display the model string (e.g., FA-X50R3-CT0). Verifying this string is a critical safety step to ensure the replacement hardware matches the existing cluster node before attempting the software join process (puresetup replace).

To verify the history and transmission status of Phonehome log bundles, the correct command ispurearray phonehome --list.

Before starting a controller upgrade (NDU), it is mandatory to ensure that the array can successfully transmit diagnostic data to Pure Storage. This allows Support to review the "pre-flight" checks and ensures that if an issue occurs during the upgrade, logs will be available for triage.

Usage:Running purearray phonehome --list displays a table of recent log bundles generated by the system.

Verification:The Engineer must look at the Status column for the most recent entries. A status of"uploaded"confirms that the array has successfully connected to the Pure Storage cloud and transferred the data. If the status is "queued" or "failed," the upgrade should not proceed until network connectivity (firewall/proxy) is resolved. Options A and C are incorrect CLI syntax for this specific verification task.

A valid transfer path forre-using iSCSI cardsduring a controller upgrade is from aFlashArray//XR2 to a FlashArray//XR3(Option A).

Hardware Continuity:The FlashArray//XR2 and //XR3 generations share a high degree of physical component compatibility, particularly regarding PCIe form factors and supported interface cards.

Upgrade Workflow:When performing an "Intra-Series" upgrade (refreshing just the controllers from R2 to R3 to gain CPU performance), the existing I/O cards (Fibre Channel or iSCSI) from the R2 chassis can typically be transferred directly into the new R3 controllers.

Legacy Limitations:Migrating cards from a much olderFlashArray//M(Option B or C) is generally restricted. The //M series often used older generation PCIe cards or different form factors (like onboard risers) that are not validated or physically compatible with the modern PCIe slots found in the //X series. Therefore, for //M to //X upgrades, new I/O cards are usually required, whereas R2 > R3 supports reuse.

TheFlashArray//XLcurrently supports a maximum of2 DirectFlash Shelves (DFS).

The FlashArray//XL is a high-density, performance-optimized platform housed in a 5U chassis.

Rack Unit Math:According to the FlashArray//XL specifications and site planning guide, the system supports a maximum configuration footprint of11 Rack Units (11U).

The base controller chassis occupies5U.

Each DirectFlash Shelf occupies3U.

Therefore: 5U (Base) + 3U (Shelf 1) + 3U (Shelf 2) =11U.

Capacity:Because the //XL chassis itself holds 40 DirectFlash Modules (compared to 20 in a standard //X), and each shelf holds 28 modules, a fully populated system with two shelves provides nearly 100 drives of capacity (40 + 28 + 28 = 96 drives). This massive density reduces the need for "daisy-chaining" large numbers of shelves like legacy SAS architectures. Adding a third shelf would push the total height to 14U, exceeding the current platform definition.

TheFlashArray//XLfeatures a5 Rack Unit (5U)chassis height.

This form factor represents a significant change from the standard FlashArray//X and //C series, which utilize a 3U chassis. The increase to 5U is engineered to support the massive performance and density requirements of the //XL platform.

Key Design Features:The 5U height accommodates:

Dual Controllers:Larger, high-performance controllers with increased airflow requirements.

40 DirectFlash Module Slots:Double the drive density of the 3U chassis (which holds 20), allowing for petabytes of effective capacity in the base unit.

4 Power Supplies:A 2+2 redundant power architecture.

9 PCIe Slots:Extensive I/O expansion for host and backend connectivity.

Airflow:Dedicated fan modules and thermal ducting to cool the high-wattage components (up to 3.5kW max power draw).

If a Pure Storage Technical Support Engineer (TSE) is unavailable to immediately perform the remote health checks upon the completion of the physical installation, the correct procedure is toverify that Remote Assist (RA) is enabled and update the support casewith this information.

Standard operating procedure dictates that the Implementation Engineer must not close the install case until the array has been health-checked and verified by Support. Closing the case (Option B) would signal that the work is complete when the critical validation step is missing, potentially leaving the customer with an unverified system. Emailing the account team (Option A) is helpful for visibility but does not advance the technical workflow required to close the loop.

By confirming RA is open (using purearray remoteassist) and documenting the active session port in the case notes, the Implementation Engineer enables the Support team to perform the health checks asynchronously as soon as a TSE becomes available. This ensures the "handshake" between the onsite engineer and the remote support team is maintained without delaying the engineer's departure from the site, while guaranteeing the array will be validated before final sign-off.